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Crystallographic Silicon-Etching for Ultra-High Aspect-Ratio FinFET

机译:用于超高长宽比FinFET的晶体硅蚀刻

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摘要

The fabrication process for the FinFET with ultra-high fin-height to fin-width aspect-ratio is presented. The processing is based on the crystallographic etching of (110) bulk silicon-wafers by TMAH to expose the vertical (111) planes. The nitride-spacers are used as the hard-mask for the fin-etching and the fins are isolated by the planarization and etch-back of the thick isolation oxide. The demonstration devices exhibit nearly ideal S of 62-64 mV/dec and DIBL of 10 mV/V or lower, for the gate-length of 410 nm and the height of the active part of the fin of 400 nm. The output current is limited by the large series resistances for both pFETs and nFETs, and additionally by the gate-depletion in nFETs, but large currents per fin, above 30 ?A for pFET are achieved due to tall fin-structure.
机译:提出了具有高翅片高度到翅片宽度纵横比的FinFET的制造工艺。该处理基于通过TMAH对(110)块状硅晶片的晶体学蚀刻,以暴露垂直(111)平面。氮化物间隔物用作鳍片蚀刻的硬掩模,并且通过厚隔离氧化物的平坦化和回蚀来隔离鳍片。对于410 nm的栅极长度和400 nm的鳍状有源部分高度,演示器件展现出62-64 mV / dec的近乎理想的S和10 mV / V或更低的DIBL。输出电流受到pFET和nFET的大串联电阻的限制,另外还受到nFET的栅极损耗的限制,但由于鳍结构较高,每个fin的大电流(pFET的电流超过30 µA)受到限制。

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